python-pythondata-cpu-lm32 2022.08-3 File List

Package has 113 files and 18 directories.

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  • usr/
  • usr/lib/
  • usr/lib/python3.12/
  • usr/lib/python3.12/site-packages/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32-0.0.post199-py3.12.egg-info/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32-0.0.post199-py3.12.egg-info/PKG-INFO
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32-0.0.post199-py3.12.egg-info/SOURCES.txt
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32-0.0.post199-py3.12.egg-info/dependency_links.txt
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32-0.0.post199-py3.12.egg-info/not-zip-safe
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32-0.0.post199-py3.12.egg-info/top_level.txt
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/__init__.py
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/__pycache__/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/__pycache__/__init__.cpython-312.opt-1.pyc
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/__pycache__/__init__.cpython-312.pyc
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/LICENSE.LATTICE
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/README
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/doc/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/doc/Makefile
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/doc/mmu.rst
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/jtag_cores.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/jtag_tap_spartan6.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_adder.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_addsub.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_config.v.sample
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_cpu.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_dcache.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_debug.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_decoder.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_dp_ram.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_dtlb.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_icache.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_include.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_instruction_unit.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_interrupt.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_itlb.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_jtag.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_load_store_unit.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_logic_op.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_mc_arithmetic.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_multiplier.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_ram.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_shifter.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/rtl/lm32_top.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/.gitignore
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/Makefile
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/crt.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/hello_world.c
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/linker.ld
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/lm32_config.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/pipe1.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/tb_lm32_system.v
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/.gitignore
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/Makefile
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/crt.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/linker.ld
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/macros.inc
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_add.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_addi.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_and.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_andhi.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_andi.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_b.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_be.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bg.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bge.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bgeu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bgu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bi.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bne.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_break.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_bret.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_call.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_calli.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpe.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpei.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpg.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpge.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpgei.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpgeu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpgeui.S
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  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpgu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_cmpgui.S
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  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_divu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_eret.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_lb.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_lbu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_lh.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_lhu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_lw.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_mmu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_modu.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_mul.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_muli.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_nor.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_nori.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_or.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_orhi.S
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  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_ret.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_sb.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_scall.S
  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_sextb.S
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  • usr/lib/python3.12/site-packages/pythondata_cpu_lm32/verilog/test/unittests/test_xori.S
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